RegViz: Visualize MODE Bitfield

Silicon Labs /SiM3_NRND /SIM3L168_A /CMP_0 /MODE

Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text Text

Interpret as MODE

NMUX=CMPNN0, INVEN=DISABLED, CMPMD=MODE0, INMUX=DIRECT, NWPUEN=DISABLED, PMUX=CMPNP0, CMPHYP=DISABLED, PWPUEN=DISABLED, RIEN=DISABLED, FIEN=DISABLED, CMPHYN=DISABLED

Description

Input and Module Mode

Fields

NMUX	Negative Input Select. 0 (CMPNN0): Select CMPnN.0. 1 (CMPNN1): Select CMPnN.1. 2 (CMPNN2): Select CMPnN.2. 3 (CMPNN3): Select CMPnN.3. 4 (CMPNN4): Select CMPnN.4. 5 (CMPNN5): Select CMPnN.5. 6 (CMPNN6): Select CMPnN.6. 7 (CMPNN7): Select CMPnN.7. 8 (CMPNN8): Select CMPnN.8. 9 (CMPNN9): Select CMPnN.9. 10 (CMPNN10): Select CMPnN.10. 11 (CMPNN11): Select CMPnN.11. 12 (CMPNN12): Select CMPnN.12. 13 (CMPNN13): Select CMPnN.13. 14 (CMPNN14): Select CMPnN.14. 15 (CMPNN15): Select CMPnN.15.
PMUX	Positive Input Select. 0 (CMPNP0): Select CMPnP.0. 1 (CMPNP1): Select CMPnP.1. 2 (CMPNP2): Select CMPnP.2. 3 (CMPNP3): Select CMPnP.3. 4 (CMPNP4): Select CMPnP.4. 5 (CMPNP5): Select CMPnP.5. 6 (CMPNP6): Select CMPnP.6. 7 (CMPNP7): Select CMPnP.7. 8 (CMPNP8): Select CMPnP.8. 9 (CMPNP9): Select CMPnP.9. 10 (CMPNP10): Select CMPnP.10. 11 (CMPNP11): Select CMPnP.11. 12 (CMPNP12): Select CMPnP.12. 13 (CMPNP13): Select CMPnP.13. 14 (CMPNP14): Select CMPnP.14. 15 (CMPNP15): Select CMPnP.15.
INMUX	Input MUX Select. 0 (DIRECT): Connects the NMUX signal to CP- and the PMUX signal to CP+. 1 (CMPP_VSS): Connects VSS to CP- and the PMUX signal to CP+. 2 (CMPP_DAC): Connects the NMUX signal to CP-, the PMUX signal to the Comparator DAC voltage reference, and the DAC output to CP+. 3 (CMPN_DAC): Connects the PMUX signal to CP+, the NMUX signal to the Comparator DAC voltage reference, and the DAC output to CP-.
CMPMD	Comparator Mode. 0 (MODE0): Mode 0 (fastest response time, highest power consumption). 1 (MODE1): Mode 1. 2 (MODE2): Mode 2. 3 (MODE3): Mode 3 (slowest response time, lowest power consumption).
FIEN	Falling Edge Interrupt Enable. 0 (DISABLED): Disable the comparator falling edge interrupt. 1 (ENABLED): Enable the comparator falling edge interrupt.
RIEN	Rising Edge Interrupt Enable. 0 (DISABLED): Disable the comparator rising edge interrupt. 1 (ENABLED): Enable the comparator rising edge interrupt.
DACLVL	Comparator DAC Output Level.
NWPUEN	Negative Input Weak Pullup Enable. 0 (DISABLED): Disable the negative input weak pull up. 1 (ENABLED): Enable the negative input weak pull up.
PWPUEN	Positive Input Weak Pullup Enable. 0 (DISABLED): Disable the positive input weak pull up. 1 (ENABLED): Enable the positive input weak pull up.
CMPHYN	Negative Hysteresis Control. 0 (DISABLED): Disable negative hysteresis. 1 (NEG_5_MV): Set negative hysteresis to 5 mV. 2 (NEG_10_MV): Set negative hysteresis to 10 mV. 3 (NEG_20_MV): Set negative hysteresis to 20 mV.
CMPHYP	Positive Hysteresis Control. 0 (DISABLED): Disable positive hysteresis. 1 (POS_5_MV): Set positive hysteresis to 5 mV. 2 (POS_10_MV): Set positive hysteresis to 10 mV. 3 (POS_20_MV): Set positive hysteresis to 20 mV.
INVEN	Invert Comparator Output Enable. 0 (DISABLED): Do not invert the comparator output. 1 (ENABLED): Invert the comparator output.

Links

()